features ? high cmrr: typ. 90 db at 60hz ? self-contained ? excellent audio performance ? wide bandwidth: typ. >7.6 mhz ? high slew rate: typ. 15 v/ s ? low distortion: typ. 0.0006% thd ? low noise: typ. -104.5 dbu ? low current: typ. 3 ma (per amplifier) ? several gains: 0 db, 3 db, 6 db ? industry standard pinout applications ? balanced audio line receivers ? instrumentation amplifiers ? differential amplifiers ? precision summers ? current shunt monitors that 1280, 1283, 1286 the that 1280 series of precision differen- tial amplifiers was designed primarily for use as balanced line receivers for audio applications. gains of 0 db, 3 db, and 6 db are available to suit various applications requirements. these devices are laser-trimmed in wafer form to obtain the precision resistor matching needed for high cmr performance and precise gain. manufactured in that corporation?s proprietary complementary dielectric isolation (di) process, the 1280 series provides the sonic benefits of discrete designs with the simplicity, reliability, matching, and small size of a fully integrated solution. all three versions of the part typically exhibit 90 db of common-mode rejection. with 15 v/ s slew rate, 7.6 mhz or higher bandwidth, and 0.0006% thd, these devices are sonically trans- parent. moreover, current consumption is typically a low 6 ma (3 ma per amplifier). the 1280 series is available in a 14-pin soic package. the 1280 is pin-compatible with the ti ina2134, and the 1286 is pin-compatible with the ti ina2137 and the adi ad8273. description r 4 r 2 &r 4 r 1 &r 3 r 3 r 2 r 1 r 2 r 1 r 4 r 3 sns b sns a out b out a ref b ref a 14 13 12 11 10 9 8 1234567 v cc vee in+ a in+ b in- a in- b nc nc gain part no. THAT1280 that1283 that1286 0 db -3 db -6 db figure 1. equivalent circuit 14 ref a 13 out a 12 sense a 11 v cc 10 sense b 9 out b 8 ref b 7 n/c 6 in- b 5 in+ b 4 v ee 3 in+ a 2 in- a 1 n/c pin number pin name table 1. pin assignments dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; us a tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation document 600114 rev 01 www.datasheet.co.kr datasheet pdf - http://www..net/
document 600114 rev 01 page 2 of 10 that 1280 series dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; usa tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation supply voltages (v cc - v ee )40v maximum in - or in + voltage -50v + v cc , 50v + v ee max/min ref or sense voltage v cc + 0.5v, v ee - 0.5v maximum output voltage (v om )v cc + 0.5v, v ee - 0.5v storage temperature range (t st ) -40 to +125 oc operating temperature range (t op ) -40 to +85 oc output short-circuit duration (t sh ) continuous junction temperature (t j ) +125 oc absolute maximum ratings 2,3 specifications 1 parameter symbol conditions min typ max units supply current i cc ; -i ee no signal ? 6 8 ma supply voltage v cc -v ee 6 ? 36 v input voltage range v in-diff differential (equal and opposite swing) 1280 (0db gain) ? 21.5 ? dbu 1283 (-3db gain) ? 24.5 ? dbu 1286 (-6db gain) ? 27.5 ? dbu v in-cm common mode 1280 (0db gain) ? 27.5 ? dbu 1283 (-3db gain) ? 29.1 ? dbu 1286 (-6db gain) ? 31 ? dbu input impedance 5 z in-diff differential 1280 (0db gain) ? 18 ? k 1283 (-3db gain) ? 21 ? k 1286 (-6db gain) ? 24 ? k z in-cm common mode all versions ? 18 ? k common mode rejection ratio cmrr matched source impedances; v cm = 10v dc 70 90 ? db 60hz 70 90 ? db 20khz ? 85 ? db power supply rejection ratio 6 psrr 3v to 18v; v cc = -v ee ; all gains ? 90 ? db total harmonic distortion thd v out = 5vrms, f = 1khz, bw = 22khz, r l = 2 k ? ? 0.0006 ? % output noise e out 22 hz to 22khz bandwidth 1280 (0db gain) ? -104.5 ? dbu 1283 (-3db gain) ? -105.9 ? dbu 1286 (-6db gain) ? -107.3 ? dbu slew rate sr r l = 2k ; c l = 300 pf, all gains 10.5 15 ? v/ s electrical characteristics 2,4 1. all specifications are subject to change without notice. 2. unless otherwise noted, t a =25oc, v cc =+15v, v ee = -15v. 3. stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rat ings only; the functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not impl i ed. exposure to absolute maximum rating condi- tions for extended periods may affect device reliability. 4. 0 dbu = 0.775 vrms. 5. while specific resistor ratios are very closely trimmed, absolute resistance values can vary 25% from the typical values sh ow n. input impedance is monitored by lot sampling. 6. defined with respect to differential gain. 7. parameter guaranteed over the entire range of power supply and temperature. www.datasheet.co.kr datasheet pdf - http://www..net/
that 1280 series page 3 of 10 document 600114 rev 01 dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; usa tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation parameter symbol conditions min typ max units small signal bandwidth bw -3db r l = 2k ; c l = 10 pf 1280 (0db gain) ? 7.6 ? mhz 1283 (-3db gain) ? 9.6 ? mhz 1286 (-6db gain) ? 11.6 ? mhz output gain error g er-out -0.05 ? 0.05 db output voltage swing v o+ r l = 2k ; c l = 200 pf v cc -2.5 v cc -2 ? v v o- r l = 2k ; c l = 200 pf ? v ee +2 v ee +2.5 v output offset voltage v off no signal -1 ? 1 mv output short circuit current i sc r l = 0 ? 42 ? ma capacitive load 7 c l ? ? 300 pf channel separation f = 1khz ? 120 ? db electrical characteristics (con?t )2,4 r 2 r 1 r 4 r 3 sense vout ref v cc v ee v in(cm) in+ in- r l ?v in(diff) ~ ~ ~ b a c l ?v in(diff) figure 2. simplified test circuit (1/2 of 128x shown) www.datasheet.co.kr datasheet pdf - http://www..net/
the that 1280 series ics consist of two high performance opamps with int egrated, laser-trimmed resistors. these designs take advantage of that?s fully complementary dielectric isolation (di) process to deliver excellent performance with low current consumption. the devices are simple to apply in a wide range of applications. resistor trimming, values, and cmrr the 1280-series devices rely upon proprietary, laser-trimmed, silicon-chr omium (si-cr), thin-film, integrated resistors to de liver the precise matching required to achieve a 90 db common mode rejection ratio. trimming is performed in two cycles, both using dc inputs. first, gain is set by trimming the r 1 /r 2 pair. then, cmrr is set by trimming the other pair (r 3 /r 4 ). generally, only one resistor of each pair is trimmed (whichever needs to increase to meet the required specification). to achieve 90 db cmrr, the r 3 /r 4 ratio is trimmed to within 0.005 % of the r 1 /r 2 ratio. since the resistors themselves are on the order of 10 k (see figure 1 for actual values, which change with the specific part), an increase of as little as 0.6 can reduce the cmrr from over 90 db to 84 db. the better the starting cmrr, the more impact (in db) a given added resistance will have. therefore, to achieve this high cmrr in practice, take care to ensure that all source imped- ances remain balanced. to accomplish this, pcb traces carrying signals should be balanced in length, connector resistance should be minimized, and any input capacitance (including strays) should be balanced between the + and - legs of the input circuitry. note that the additional contact resistance of some sockets is sufficient to undo the effects of precision trimming. therefore, socketing the parts is not recommended. that?s 1200-series ingenius ? input stages address many of these difficulties through a patented method of increasing common- mode input impedance, and should be considered for any critical applications. a further consideration is that after trimming, the two resistor divider ratios are tightly controlled, but the actual value of any individual resistor is not. the initial tolerance of the resistors is quite wide, so it is possible for any given resistor to vary over a surprisingly wide range. lot-to-lot variations of up to 30 % are to be expected. input considerations the 1280-series devices are internally protected against input overload via an unusual arrangement of diodes connecting the + and - input pins to the power supply pins. the circuit of figure 3 shows the arrangement used for the r 3 /r 4 side; a similar one applies to the other side. the zener diodes prevent the protection network from conducting until an input pin is raised at least 50 v above v cc or lowered 50v below v ee . thus, the protection networks protect the devices without constraining the allowable signal swing at the input pins. the reference (and sense) pins are protected via more conventional reverse- biased diodes which will conduct if these pins are raised above v cc or below v ee . to reduce risk of damage from esd, and to prevent rf from reaching the devices, that recom- mends the circuit of figure 4. c 3 through c 5 should be located close to the point where the input signal comes into the chassis, preferably directly on the connector. the unusual circuit design is intended to minimize the unbalancing impact of differences in the values of c 4 and c 5 by forcing the capacitance from each input to chassis ground to depend primar- ily on the value of c 3 . the circuit shown is approxi- mately ten times less sensitive to mismatches between c 4 and c 5 than the more conventional approach in which the junction of c 4 and c 5 is grounded directly. an excellent discussion of input stage grounding can be found in the june 1995 issue of the journal of the audio engineering society , vol. 43, no. 6, in articles by stephen macatee, bill whitlock, and others. note that because of the tight matching of the internal resistor ratios, coupled with the uncertainty document 600114 rev 01 page 4 of 10 that 1280 series dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; usa tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation - + in+ ref v cc v ee v cc v ee r 3 r 4 figure 3. representative input protection circuit c4 470p c5 470p c3 47p in+ in- out c1 100n c2 100n v cc v ee in- 2/6 in+ 3/5 out 13/9 u1 that 1286/ 1283/ 1280 ref sens v ee v cc 12/10 11 4 14/8 figure 4. rfi and supply bypassing theory of operation www.datasheet.co.kr datasheet pdf - http://www..net/
in absolute value of any individual resistor, rf bypassing through the addition of r-c networks at the inputs (series resistor followed by a capacitor to ground at each input) is not recommended. the added resistors can interact with the internal ones in unexpected ways. if some impedance for the rf-bypass capacitor to work against is deemed necessary, that recommends the use of a ferrite bead or balun instead. if it is necessary to ac-couple the inputs of the 1280-series parts, the coupling capacitors should be sized to present negligible impedance at any frequen- cies of interest for common mode rejection. regard- less of the type of coupling capacitor chosen, variations in the values of the two capacitors, working against the 1280-series input impedance (itself subject to potential imbalances in absolute value, even when trimmed for perfect ratio match), can unbalance common mode input signals. this can convert common-mode to balanced signals which will not be rejected by the cmrr of the devices. for this reason, that recommends dc-coupling the inputs of the 1280-series devices. input voltage limitations when configured, respectively, for -3 db and -6 db gain, the 1283 and 1286 devices are capable of accepting input signals above the power supply rails. this is because the internal opamp?s inputs connect to the outside world only through the on-chip resis- tors r 1 through r 4 at nodes a and b as shown in figure 2. consider the following analysis. differential input signals for differential signals (v in(diff) ), the limitation to signal handling will be output clipping. the outputs of all the devices typically clip at within 2v of the supply rails. therefore, maximum differential input signal levels are directly related to the gain and supply rails and can be calculated in dbu as follows: v in ( diff ) = 20 log v cc ? v ee 2 ? 2 v 2 0.775 ? gain or v in ( diff ) = 20 log ( v cc ? v ee ? 4 v )? gain ? 6.8 db for example, if v cc =15v, v ee =-15v, and gain = -3 db, then v in ( diff ) = 20 log [ 15 v ?(? 15 v )? 4 v ]?(? 3 db )? 6.8 db = 24.5 dbu common-mode input signals for common-mode input signals, there is essen- tially no output signal. the limitation on common- mode handling is the point at which the inputs are overloaded. so, we must consider the inputs of the opamp. for common-mode signals (v in(cm) ), the common-mode input current splits to flow through both r 1 /r 2 and through r 3 / r 4 . because v b is constrained to follow v a ,we will consider only the voltage at node a. the voltage at a can be calculated as: v a = v in ( cm ) r 4 r 3 + r 4 solving for v in(cm) , v in ( cm ) = v a r 3 + r 4 r 4 for the 1280, (r 3 + r 4 ) /r 4 = 2. for the 1283, (r 3 + r 4 ) /r 4 = 2.4. for the 1286, (r 3 + r 4 ) /r 4 = 3. furthermore, the same constraints apply to v a as in the differential analysis. following the same reasoning as above, the maximum common-mode input signal for the 1280 is (2v cc - 4) v, and the minimum is (2v ee + 4) v. for the 1283, these figures are (2.4v cc - 4.8) v, and (2.4v ee + 4.8) v. for the 1286, these figures are (3v cc - 6) v, and (3v ee + 6) v. therefore, for common-mode signals and 15 v rails, the 1280 will accept up to ~26 v in either direction. as an ac signal, this is 52 v peak-peak, 18.4 v rms, or +27.5 dbu. with the same supply rails, the 1283 will accept up to ~31 v in either direction. as an ac signal, this is 62 v peak-peak, 21.9 v rms, or +29 dbu. with the same supply rails, the 1286 will accept up to ~39 v in either direction. as an ac signal, this is 78 v peak-peak, 27.6 v rms, or +31 dbu. of course, in the real world, differential and common-mode signals combine. the maximum signal that can be accommodated will depend on the superposition of both differential and common-mode limitations. output considerations the 1280-series devices are typically capable of supplying 42 ma into a short circuit. while they will survive a short, power dissipation will rise dramati- cally if the output is shor ted. junction temperature must be kept under 125 oc to maintain the devices? specifications. these devices are stable with up to 300 pf of load capacitance over the entire rated temperature range, and even more at room temperature. power supply considerations the 1280-series parts are not particularly sensi- tive to the power supply, but they do contain wide bandwidth opamps. accordingly, small local bypass capacitors should be located within a few inches of the supply pins on these parts, as shown in figure 4. selecting a gain variation the three different parts offer different gain structures to suit different applications. the 1286 is customarily configured for -6 db gain, but by revers- ing the resistor connections, it can also be configured for +6 db. the 1283 is most often configured for -3 db gain, but can also be configured for +3 db. the choice of input gain is determined by the input that 1280 series page 5 of 10 document 600114 rev 01 dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; usa tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation www.datasheet.co.kr datasheet pdf - http://www..net/
volta g e ran g e to be accommodated, and the power supply voltages used within the circuit. to minimize noise and maximize signal-to-noise ratio, the input stage should be selected and config- ured for the highest possible gain that will ensure that maximum-level input signals will not clip the input stage or succeeding stages. for example, with 18 v supply rails, the 1280-series parts have a maximum output signal swing of +23 dbu. in order to accommodate +24 dbu input signals, the maximum gain for the stage is -1 db. with 15 v supply rails, the maximum output signal swing is ~+21.1 dbu; here, -3 db is the maximum gain. in each case, a 1283 confi g ured for -3 db g ain is the ideal choice. the 1280 (0 db gain only) will not provide enough headroom at its output to support a +24 dbu input signal. the 1286 (configured for -6 db gain) will increase noise, thus reducing dynamic range, by attenuating the input signal more than necessary to support a +24 dbu input. in fact, for most professional audio applications, that recommends the -3 db input configuration possible only with the 1283 in order to preserve dynamic range within a reasonable range of power supply voltages and external headroom limits. document 600114 rev 01 page 6 of 10 that 1280 series dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; usa tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation www.datasheet.co.kr datasheet pdf - http://www..net/
the that 1280, 1283, and 1286 are usually thought of as precision differential amplifiers with gains of zero, -3 and -6 db respectively. these devices are primarily intended as balanced line receivers for audio applications. however, their topology lends itself to other applications as well. basic balanced receiver applications figures 5, 6, and 7, respectively, show the 1280, 1286 and 1286 configured as zero, -3 db, and -6 db line receivers. figures 8 and 9, respectively, show the 1283 and 1286 configured as +3 db and +6 db line receivers. the higher gains are achieved by swapping the positions of the resistors within each pair in regard to signal input vs. output. precision summing application figure 10 shows a 1280 configured as a preci- sion summing amplifier. this circuit uses both the in+ and ref pins as inputs. because of the excellent matching between the laser- trimmed resistor pairs, the output voltage is precisely equal to the sum of the two input voltages. instrumentation amplifier application figure 11 shows one half of a 1280 configured as an instrumentation amplifier. the two opamps preceding the 1280 buffer the input signal before passing it on to the 1280. the op270 shown was chosen for its combination of good ac and dc performance. in this configuration, the opamps provide gain equal to 1+(9.98 k / r g ) for differential signals, but unity gain for common-mode signals. the 1280 then rejects the common mode signal while passing on the differential portion. as well, the opamps buffer the input of the 1280, raising the circuit?s input impedance to both differential and common-mode signals. this makes the circuit?s common-mode rejection less sensitive to variations in the source impedance driving the stage. as noted in the theory of operation section, that?s ingenius ? input stages use patented circuitry to increase common-mode input impedance. this even further inproves common-mode rejection in real-world applications. see the that 1200-series datasheet for more information. that 1280 series page 7 of 10 document 600114 rev 01 dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; usa tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation applications 13/9 14/8 3/5 2/6 in+ in- 12/10 9k 9k 9k 9k u1 1280 output 11 4 sense vout ref v cc v ee in+ in- figure 5. zero db line receiver 13/9 14/8 3/5 2/6 in+ in- 12/10 10.5k 7.5k 10.5k 7.5k u1 1283 output 11 4 sense vout ref v cc v ee in+ in- figure 6. -3 db line receiver 13/9 14/8 3/5 2/6 in+ in- 12/10 12k 6k 12k 6k u1 1286 output 11 4 sense vout ref v cc v ee in+ in- figure 7. -6 db line receiver 13/9 14/8 3/5 2/6 in+ in- 12/10 10.5k 7.5k 10.5k 7.5k u1 1283 out 11 4 sense vout ref v cc v ee in+ in- figure 8. +3 db line receiver www.datasheet.co.kr datasheet pdf - http://www..net/
driving analog-to-digital converters figure 12 shows a convenient method of driving a typical audio adc with balanced inputs. this circuit accepts +24 dbu in. by using both halves of a single 1283 ic connected in anti-phase, the maximum signal level between their respective outputs is +27 dbu. an attenuator network brings this si g nal down by 18.8 db while attenuatin g the noise of the line receivers as well. in adc applications such as this, noise is usually a significant consideration. the output noise of one channel of a that1283 is -105.9 dbu in a 22 khz bandwidth, or 26.6 nv/ hz. since both channels are used, and since noise adds in random fashion (square-root of the sum of the squares), the total noise level at the input of the resistive pad (r 1 ~ r 3 ) will be -102.9 dbu or 37.5 nv/ hz. the pad reduces this noise level to -121.7 dbu or 4.3 nv/ hz at the input to the adc, while c 1 provides low-pass filtering typically required by adcs. the thermal noise of the resistive attenuator is 1.87 nv/ hz or the equivalent noise of a 210 ? resis- tor. therefore, the total noise density going into the input of the adc will be . e n adc input =( 1.87 nv hz ) 2 +( 4.3 nv hz ) 2 = 4.7 nv hz the noise floor can then be calculated to be . noise ( dbu ) = 20 log 4.7 nv hz % 22 khz 0.775 =? 121 dbu controlling gain in balanced systems when it becomes necessary to control gain in a balanced system, designers are often tempted to keep the signal balanced and use two voltage controlled amplifiers (vcas) to control the gain on each half of the balanced signal. unfortunately, this can result in common-mode to differential-mode conversion (degrading cmrr) when there are even slight differ- ences in gain between the vcas. a better approach is to convert the signal to single-ended, alter the gain, and then convert back to balanced. figure 13 shows a stereo gain control for a balanced system. first, we use a 1283 -3 db line receiver to perform the balanced to single-ended conversion. a that 1606, with +6db gain, is used to rebalance the signal before the circuit?s output. a that 2162 dual vca is used to alter gain based on a dc voltage applied at e c- , the ?control voltage? node. (this point is intended to be driven from a low-impedance, low-noise voltage source. see the that 2162-series data sheet for details.) as shown, the vca section is configured for ?static? gain of -3 db (gain with 0 vdc applied to the e c- ) due to the choice of ratio of r 3 to r 2 and r 7 to r 6 . additionally, the 1283 has a gain of -3 db for a total attenuation of 6 db before the output driver. the 1606 has a gain of 6 db, therefore the circuit has a gain of 0 db with 0 v at the control voltage node. this circuit accepts and delivers over +24 dbu before clipping, and has a noise floor of -91.5 dbu (22 khz bandwidth). by varying the control voltage, gains from -70 db to +40 db may easily be achieved. the vca?s ?deci-linear? relationship between control voltage and gain makes the gain setting precise, predictable, and repeatable. document 600114 rev 01 page 8 of 10 that 1280 series dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; usa tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation 13/9 output 14/8 3/5 2/6 input 1 input 2 12/10 9k 9k 9k 9k u1 1280 sense vout ref v cc v ee in+ in- 11 4 3 2 1 u2a op-270 5 6 7 u2b op-270 r1 rg r4 100k r5 100k r2 4k99 r3 4k99 in+ in- out c2 100n c1 100n v cc v ee in- 2 in+ 3 out 13 u1 THAT1280 ref sens v ee v cc 12 11 4 14 figure 11. instrumentation amplifier figure 10. precision two-input summing circuit 13/9 14/8 3/5 2/6 in+ in- 12/10 12k 6k 12k 6k u1 1286 output 11 4 sense vout ref v cc v ee in+ in- figure 9. +6 db line receiver www.datasheet.co.kr datasheet pdf - http://www..net/
that 1280 series page 9 of 10 document 600114 rev 01 dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; usa tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation vout 13 in+ 3 in- 2 u1a 1283 in 1 hi in 1 lo out 1 hi out 1 lo in- in+ 7 6 gnd 5 in- in+ 7 6 gnd 5 out- 3 out+ 14 u2 1606 r2 20k0 r3 14k3 c2 n/c n/c 10n c3 22p in 72 out u3a 2162(vca1) 3 2 1 u4a 4580 v cc v cc v ee control voltage 1 6.2mv/db -3db +6db vee cap1 vcc cap2 12 4 13 11 ec- ec+ sym v+ 4 6 3 12 v cc v+ 8 v ee v- 4 v cc v+ 11 sense ref 12 14 vout 9 in+ 5 in- 6 u1b 1283 in 2 hi in 2 lo out 2 hi out 2 lo out- 3 out+ 14 u5 1606 c4 100n r6 20k0 r7 14k3 r5 1m0 c1 100n r1 1m0 c5 10n c6 22p in 10 15 out u3b 2162(vca2) 5 6 7 u4b 4580 v ee v cc v ee control voltage 2 6.2mv/db vee cap1 vcc cap2 12 4 13 11 gnd ec- ec+ sym v- 5 v ee v- 4 8 13 11 14 sense ref 10 8 -3db figure 13. voltage-controlled gain control of a balanced signal in hi in lo ain- to adc ain+ to adc r1 -18.8 db 909r r2 237r r3 909r c1 2n2 +24 dbu in vout 13 in+ 3 in- 2 u1 that 1283 vout 9 in+ 5 in- 6 u2 3 2 1 u3a 4580 1/2 vref of adc +27 dbu 2 vrms out ref sense 12 14 ref sense 10 8 that 1283 figure 12. circuit for audio adcs with balanced inputs www.datasheet.co.kr datasheet pdf - http://www..net/
the THAT1280 series is available in a 14-pin surface mount (soic) package. package dimensions are shown in figure 14 below; pinouts are given in table 1 on page 1. order ing information is provided in table 2 below. the 1280 series package is entirely lead-free. the lead-frame is copper, plated with successive layers of nickel, palladium, and gold. this approach makes it possible to solder these devices using lead- free and lead-bearing solders. neither the lead-frame nor the the plastic mold compound used in the 1280-series contains any hazardous substances as specified in the european union's directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment 2002/95/eg of january 27, 2003. the surface-mount package is suitable for use in a 100% tin solder process. document 600114 rev 01 page 10 of 10 that 1280 series dual balanced line receiver ics that corporation; 45 sumner street; milford, ma 01757-1656; usa tel: +1 508 478 9200; fax: +1 508 478 0990; web: www.thatcorp.com copyright ? 2007, that corporation e c b d a h 1 f g 1 0.41/1.27 h 0.016/0.05 0.228/0.244 0.0075/0.0098 0.053/0.068 0.014/0.018 0.337/0.346 inches 0.150/0.157 f g d e a b c item millimeters 0.36/0.46 0.19/0.25 1.35/1.73 1.27 8.56/8.79 3.81/3.99 5.80/6.20 0.050 figure 14. so package outline drawing parameter symbol conditions min typ max units package style see fig. 14 for dimensions 14 pin so thermal resistance ja so package soldered to board 100 oc/w environmental regulation compliance complies with january 27, 2003 rohs requirements soldering reflow profile jedec jesd22-a113-d (250 oc) moisture sensitivity level msl above-referenced jedec soldering profile 1 package characteristics 1286s14-u -6 db 1283s14-u -3 db 1280s14-u 0 db order number gain table 2. ordering information package information www.datasheet.co.kr datasheet pdf - http://www..net/
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